Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.
Looking for accomplished software engineer to join a team of highly skilled developers working on state-of-the-art timing closure system.
Job duties will include working on very high capacity data-model to represent full-chip physical data, a high performance GUI for representing and editing hierarchical full-chip data, and optimization methods for automatic and semi-automatic timing closure.
Candidate must have MS or Ph.D. in EE or CS, with minimum 5 years EDA software development experience in data-model, GUI, static timing analysis and optimization or related areas, using C++ and tcl.We’re doing work that matters. Help us solve what others can’t.
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