Sr Principal FPGA Design Engineer

Location: Bengaluru / Karnataka

Job type

Employment type: Full-Time

Pay: Competitive/hour

Search Button I'm interested

Job description

Req#: R30694

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

The position requires MSEE, or equivalent, with a minimum of 8-10 yrs of industry experience in designing hardware systems.

Must have excellent communication skills, both written and verbal.

Technical expertise in FPGA design for Xilinx UltraScale / UltraScale+ FPGA products is required.

Experience in FPGA design methodologies including high speed design, serial protocols and FPGA timing closure is desired.

Experience with industry standard interfaces such as PCIExpress, DDR4/5, USB, Ethernet, I2C, JTAG, High speed SerDes is required.

RTL design knowledge using Verilog is required along with experience in using RTL verification tools and flows.

Verification using with Cadence simulation products is desired.

Experience with scripting languages like Perl, TCL C-shell is strongly recommended.

Experience with PCB tools is also desired.

We’re doing work that matters. Help us solve what others can’t.

By submitting your interest in this job, you agree to receive text notifications with additional steps to complete your job application. You will receive up to 6 messages from the number "63879". Message & data rates may apply. Please refer to our privacy policy for more information.

About company

Cadence Design Systems, Inc., headquartered in San Jose, California, in the North San Jose Innovation District, is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Sy...
Search Button I'm interested

Not interested?

Search jobs


Powered by Talentify