Principal Software Engineer, DFT/ATPG

Location: San Jose / California

Job type

Employment type: Full-Time

Pay: Competitive/hour

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Job description

Req#: R29508-1

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Cadence Design Systems is looking for a highly motivated engineer to work with the Modus Test R&D engineering team in the Front-End Design business unit. You will be part of a team responsible for designing, developing, debugging and supporting Design-for-Test hardware and software. Development responsibilities will include supporting VLSI Design Automation with a focus on embedding of Design-for-Test logic within the RTL and gate-level descriptions of logic designs to enable them to be easily testable and verifiable when they are manufactured.

The Position Requirements are…

The successful candidate will possess the following combination of education and experience:

  • BS/MS in Computer Science or Computer Engineering or Electrical Engineering
  • Excellent digital logic design skills
  • Excellent C/C++ programming and software engineering skills
  • Excellence in algorithm and data structure design
  • Experience with UNIX and/or LINUX platforms is preferred
  • Strong knowledge of Tcl oe Perl is preferred
  • Strong ability to learn
  • Strong analysis and problem solving skills
  • Prior experience with large hardware or software development projects is highly recommended
  • Good communication skill is preferred as the development team is distributed
We’re doing work that matters. Help us solve what others can’t.

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About company

Cadence Design Systems, Inc., headquartered in San Jose, California, in the North San Jose Innovation District, is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Sy...
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