At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
This exciting new position in device emulation to analyze device security vulnerabilities.
The skills requirements include but are not limited to:
- Digital micro-architecture definition and documentation
- RTL logic design, debug and functional verification
- Understanding of digital architecture trade-offs for power, performance, and area
- Understanding of proper handling of multiple asynchronous clock domains and their crossings
- Understanding of Lint checks and proper resolution of errors
- Understanding synthesis timing constraints, static timing analysis and constraint development
- Understanding of fundamental physical design flows and stages
- Understanding impacts of analog and mixed-signal design and verification on digital-on-top development flow.
- Exhibit excellent communication skills and be self-motivated and well organized.
- Experience with FPGA and/or emulation platform required
- Firmware development of embedded micro-controller systems is a plus.
- Substantial experience with Verilog is required, as are excellent logic and debug skills.
This is an exciting new opportunity to expand our Methodologies Implementation Group to build flows and methodologies to analyze weaknesses in customer best and most secure devices.We’re doing work that matters. Help us solve what others can’t.