Principal Application Engineer

Location: York Street - Colombo / Western

Job type

Employment type: Full-Time

Pay: Competitive/hour

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Job description

Req#: R30606-2

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

This exciting position in Digital Front End design is to build flows/methodologies to enable Cadence customer to successfully design and build the next generation devices to power a connected world.

The skills requirements include but are not limited to:

  • Digital micro-architecture definition and documentation specifically related to advanced security methodologies
  • RTL logic design, debug and functional verification
  • IP integration and verification
  • Understanding of digital architecture trade-offs for power, performance, and area
  • Understanding of proper handling of multiple asynchronous clock domains and their crossings
  • Understanding of Lint checks and proper resolution of errors
  • Understanding synthesis timing constraints, static timing analysis and constraint development
  • Understanding of fundamental physical design flows and stages
  • Understanding impacts of analog and mixed-signal design and verification on digital-on-top development flow.
  • Exhibit excellent communication skills and be self-motivated and well organized.
  • Experience with FPGA and/or emulation platform
  • Firmware development of embedded microcontroller systems is a plus.
    Substantial experience with Verilog is required, as are excellent logic and debug skills. 
We’re doing work that matters. Help us solve what others can’t.

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About company

Cadence Design Systems, Inc., headquartered in San Jose, California, in the North San Jose Innovation District, is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Sy...
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