Lead Application Engineer

Location: San Jose / California

Job type

Employment type: Full-Time

Pay: Competitive/hour

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Job description

Req#: R30614

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

·      At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Technical field support for Cadence Digital and Signoff Group (DSG) products. Support Cadence digital tools across the full RTL-GDSII Cadence digital tool suite with primary focus on Cadence's front-end solutions.

These support roles include the following operations and requirements:

·         understanding customer needs and identifying solutions to their challenges with Cadence digital design tools. 

·         Manage strategic customer  to establish technology differentiation and assert Cadence competitive advantages.

·         Multiplex several issues and set priorities and exploit new technologies are essential for success in the position.

·         Assist customers with adopting Cadence Back End tools in Synthesis with Genus, Place & Route with Innovus and Static Timing Analysis with Tempus by providing methodology and tool knowledge to IC design process, validated through successful design tapeouts.

·         Drive best practices and lessons learnt from  and customer interactions back in to product development and Cadence field engineers.

·         Develop an understanding of the customer's needs and also of the competition's technology and sales strategies.

·         Perform methodology assessments, improve existing design methodologies, and develop new ones that leverage Cadence technology and services. 

·         Create and conduct technical presentations and product demonstrations to customers.

·         TCL/Perl Scripting to achieve quick Design Automation solutions for customer.

·         Close collaboration with R&D on issues using established protocols.

·         Communicate with customers on issue workarounds and new tool fixes.

Requirements:

·         Self-starter mindset with an established track record of complex problem solving in SOC physical design. 

·         Excellent communication skills and be adept at working with both customer engineers/mgmt. as well as Cadence team members and RnD. 

·         Demonstrated experience in several of the following areas: 

RTL Synthesis/Physical Synthesis, Design constraint creation, Floorplanning/Power Grid Synthesis, Placement, Clock tree synthesis, Routing, Static timing analysis, Timing optimization, Power Analysis (Static, Dynamic, Leakage, EM), Extraction Low power implementation.

·         Must be motivated to be mentored by colleagues to increase team productivity.

·         proficient software skills in the automation of physical design software including several of the following: 

TCL, PERL, CSH, BASH, AWK, SED, or SKILL.

·         BSEE required MSEE with 5-8 years of related industry experience

         

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About company

Cadence Design Systems, Inc., headquartered in San Jose, California, in the North San Jose Innovation District, is an American multinational electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Sy...
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